Lead SoC Performance Architect

Position Summary

We are looking for a lead SOC performance architect to build models for analysis of new SoC
architectures and features for next generaNon mobile products. Solid architecture foundaNon,
leadership, and SoC modeling experience is desired for success for this leadership role.

Role and Responsibilities

Perform high-level performance modeling and analysis of hardware features, applicaNons,
benchmarks, and uses cases.
• Develop complex SoC performance models to help evaluate PPA (power, performance, area)
targets including CPU, GPU, ISP, NPU, and memory subsystem – parNcularly around mobile
plaVorms.
• Leverage Industry standard tools and/or create in house tools to speed up performance
evaluaNon and analysis.
• Work across the organizaNon to analyze workloads and decompose/map workload
components to IPs to opNmize system performance and energy.
• Analyze system-level architectural trade-offs (across mapping of workload to CPU, GPU, NPU,
ISP, memory subsystems, and system so[ware).
• Evaluate architecture proposal performance benefits in collaboraNon with SoC Architects
• Mentor the SoC performance modeling team.

Skills and Qualifications

Undergraduate with 12+, Masters with 10+ or PhD with 7+ years of combined educaNon,
training, and experience in Computer Science/Engineering or equivalent field
• Proficiency in architecture analysis and performance modeling, ranging from simple analyNcal
models to complex cycle accurate performance model and correlaNon.
• Strong modeling and simulator development skills and able to code in SystemC, C, C++, Python
and similar programming languages.
• Experience with industry standard performance and power modeling tools.
• Deep experience modeling SoC architectures and understanding the challenges involved in
integraNng internal/external IP and analyzing system-level performance and behavior.
• Knowledge of the following: CPU, Interconnect and bus protocols and memory subsystem
design – including memory subsystems, GPU, and NPU
• Ability to evaluate architecture proposals, internal and external IP features.