As a Senior FPGA Engineer at Dhruva Space, you will be responsible for leading the design, development, and optimization of FPGA-based signal processing solutions. Your expertise in FPGA architectures, digital signal processing (DSP), and system integration will be crucial for the successful execution of the role. Your strong debugging skills, hands-on experience with RFSoC platforms, and collaborative mindset will enable you to work effectively with cross-functional teams.
Key Responsibilities:
– Design, develop, and optimize FPGA architectures using VHDL.
– Implement and verify RFSoC-based FPGA designs using AMD Vivado and Vitis.
– Develop and optimize digital signal processing (DSP) algorithms for FPGA implementations.
– Conduct functional simulations, verification, and detailed timing analysis to ensure FPGA timing closure.
– Perform FPGA debugging and troubleshooting using hardware tools such as Chipscope, ILA, and SignalTap.
– Interface FPGA designs with external hardware components, including ADC/DAC, RF transceivers, DDR, Ethernet, and other FPGA interfaces.
– Collaborate with firmware, software, and hardware teams for seamless system integration.
– Develop test benches and perform simulations for verification of FPGA modules.
– Optimize resource utilization and improve FPGA performance for high-speed data processing applications.
– Lead FPGA development efforts and manage team deliverables.
Candidate Requirements:
– Bachelors/Masters in Electronics, Electrical, or Computer Engineering.
– 57 years of experience in FPGA design & development.
– Proficiency in Filtering, Modulation/Demodulation, FFT, Adaptive Filtering.
– Experience with RFSoC evaluation boards and custom FPGA boards.
– Familiarity with AMD Vivado, Vitis, Chipscope, ILA, SignalTap.
– Knowledge of AXI, DDR, Ethernet, UART, SPI interfaces.
– Skills in FPGA timing analysis and logic troubleshooting.
– Understanding of RF architecture and FPGA acceleration techniques.
– Proficiency in MATLAB, Python, TCL, high-speed data processing, and embedded system integration. As a Senior FPGA Engineer at Dhruva Space, you will be responsible for leading the design, development, and optimization of FPGA-based signal processing solutions. Your expertise in FPGA architectures, digital signal processing (DSP), and system integration will be crucial for the successful execution of the role. Your strong debugging skills, hands-on experience with RFSoC platforms, and collaborative mindset will enable you to work effectively with cross-functional teams.
Key Responsibilities:
– Design, develop, and optimize FPGA architectures using VHDL.
– Implement and verify RFSoC-based FPGA designs using AMD Vivado and Vitis.
– Develop and optimize digital signal processing (DSP) algorithms for FPGA implementations.
– Conduct functional simulations, verification, and detailed timing analysis to ensure FPGA timing closure.
– Perform FPGA debugging and troubleshooting using hardware tools such as Chipscope, ILA, and SignalTap.
– Interface FPGA designs with external hardware components, including ADC/DAC, RF transceivers, DDR, Ethernet, and other FPGA interfaces.
– Collaborate with firmware, software, and hardware teams for seamless system integration.
– Develop test benches and perform simulations for verification of FPGA modules.
– Optimize resource utilization and improve FPGA performance for high-speed data processing applications.
– Lead FPGA development efforts and manage team deliverables.
Candidate Requirements:
– Bachelors/Masters in Electronics, Electrical, or Computer Engineering.
– 57 years of experience in FPGA design & development.
– Proficiency in Filtering, Modulation/Demodulation, FFT, Adaptive Filtering.
– Experience with RFSoC evaluation boards and custom FPGA boards.
– Familiarity with AMD Vivado, Vitis, Chipscope, ILA, SignalTap.
– Knowledge of AXI, DDR, Ethernet, UART, SPI interfaces.
– Skills in FPGA timing analysis and logic troubleshooting.
– Understanding of RF architecture and FPGA acceleration techniques.
– Proficiency in MATLAB, Python, TCL, high-speed data processing, and embedded system integration.